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10.2.1.20 AESDATALEN0 Register (Offset = 554h) [reset = X]
AESDATALEN0 is shown in Figure 10-22 and described in Table 10-30.
Crypto Data Length LSW
Figure 10-22. AESDATALEN0 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LEN_LSW
W-X
Table 10-30. AESDATALEN0 Register Field Descriptions
Bit Field Type Reset Description
31-0 LEN_LSW W X
Used to write the Length values to the Crypto peripheral. This
register contains bits [31:0] of the combined data length.
846
SWCU117A–February 2015–Revised March 2015
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