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Cryptography Registers

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Table 10-23. KEYWRITTENAREA Register Field Descriptions (continued)

Bit Field Type Reset Description

3 RAM_AREA_WRITTEN3 R/W1C X

On read this bit returns the key area written status. This bit can be

reset by writing a 1. Note: This register will be reset on a soft reset

initiated by writing to DMASWRESET.RESET. After a soft reset, all

keys must be rewritten to the key store memory.

0h = This RAM area is not written with valid key information

1h = This RAM area is written with valid key information

2 RAM_AREA_WRITTEN2 R/W1C X

On read this bit returns the key area written status. This bit can be

reset by writing a 1. Note: This register will be reset on a soft reset

initiated by writing to DMASWRESET.RESET. After a soft reset, all

keys must be rewritten to the key store memory.

0h = This RAM area is not written with valid key information

1h = This RAM area is written with valid key information

1 RAM_AREA_WRITTEN1 R/W1C X

On read this bit returns the key area written status. This bit can be

reset by writing a 1. Note: This register will be reset on a soft reset

initiated by writing to DMASWRESET.RESET. After a soft reset, all

keys must be rewritten to the key store memory.

0h = This RAM area is not written with valid key information

1h = This RAM area is written with valid key information

0 RAM_AREA_WRITTEN0 R/W1C X

On read this bit returns the key area written status. This bit can be

reset by writing a 1. Note: This register will be reset on a soft reset

initiated by writing to DMASWRESET.RESET. After a soft reset, all

keys must be rewritten to the key store memory.

0h = This RAM area is not written with valid key information

1h = This RAM area is written with valid key information

838

SWCU117A–February 2015–Revised March 2015

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