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20 Synchronous Serial Interface (SSI).................................................................................... 1353
20.1 Synchronous Serial Interface .......................................................................................... 1354
20.2 Block Diagram ........................................................................................................... 1355
20.3 Signal Description ....................................................................................................... 1356
20.4 Functional Description .................................................................................................. 1356
20.4.1 Bit Rate Generation........................................................................................... 1356
20.4.2 FIFO Operation ................................................................................................ 1356
20.4.3 Interrupts ....................................................................................................... 1357
20.4.4 Frame Formats ................................................................................................ 1358
20.5 DMA Operation .......................................................................................................... 1364
20.6 Initialization and Configuration......................................................................................... 1365
20.7 SSI Registers ............................................................................................................ 1366
20.7.1 SSI Registers .................................................................................................. 1367
21 Inter-Integrated Circuit (I
2
C) Interface ................................................................................ 1378
21.1 Inter-Integrated Circuit Interface....................................................................................... 1379
21.2 Block Diagram ........................................................................................................... 1379
21.3 Functional Description .................................................................................................. 1379
21.3.1 I
2
C Bus Functional Overview ................................................................................ 1380
21.3.2 Available Speed Modes ...................................................................................... 1382
21.3.3 Interrupts ....................................................................................................... 1382
21.3.4 Loopback Operation .......................................................................................... 1383
21.3.5 Command Sequence Flow Charts .......................................................................... 1383
21.4 Initialization and Configuration......................................................................................... 1391
21.5 I
2
C Registers ............................................................................................................. 1391
21.5.1 I2C Registers .................................................................................................. 1392
22 Integrated Interchip Sound (I2S) Module ............................................................................ 1411
22.1 Introduction .............................................................................................................. 1412
22.2 Digital Audio Interface .................................................................................................. 1412
22.3 Frame Configuration .................................................................................................... 1413
22.4 Pin Configuration ........................................................................................................ 1413
22.5 Clock Configuration ..................................................................................................... 1413
22.5.1 WCLK, BCLK, and MCLK Division Ratio................................................................... 1414
22.6 Serial Interface Formats................................................................................................ 1414
22.6.1 I2S............................................................................................................... 1414
22.6.2 Left Justified (LJF) ............................................................................................ 1415
22.6.3 Right Justified (RJF) .......................................................................................... 1415
22.6.4 DSP ............................................................................................................. 1416
22.7 Memory Interface........................................................................................................ 1417
22.7.1 Word Lengths.................................................................................................. 1417
22.7.2 Audio Channels................................................................................................ 1417
22.7.3 Memory Buffers and Pointers................................................................................ 1418
22.8 Samplestamp Generator ............................................................................................... 1418
22.8.1 Counters and Registers ...................................................................................... 1419
22.8.2 Starting Input and Output Pins .............................................................................. 1420
22.8.3 Samplestamp Capturing...................................................................................... 1420
22.9 Usage ..................................................................................................................... 1421
22.9.1 Start-up Sequence ............................................................................................ 1421
22.9.2 Termination Sequence ....................................................................................... 1422
22.10 I2S Registers ............................................................................................................ 1422
22.10.1 I2S Registers ................................................................................................. 1423
23 Radio............................................................................................................................. 1454
23.1 RF Core................................................................................................................... 1455
8
Contents SWCU117A–February 2015–Revised March 2015
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