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Factory Configuration (FCFG)

9.2.1.66 ANABYPASS_VALUE2 Register (Offset = 37Ch) [reset = FFFFC3FFh]

ANABYPASS_VALUE2 is shown in Figure 9-87 and described in Table 9-89.

Analog Bypass Value for OSC

Figure 9-87. ANABYPASS_VALUE2 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-3FFFFh

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED XOSC_HF_IBIASTHERM

R-3FFFFh R-3FFh

Table 9-89. ANABYPASS_VALUE2 Register Field Descriptions

Bit Field Type Reset Description

31-14 RESERVED R 3FFFFh

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

13-0 XOSC_HF_IBIASTHERM R 3FFh

Value of xosc_hf_ibiastherm when oscdig is bypassed.

783

SWCU117A–February 2015–Revised March 2015 Device Configuration

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