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9.2.1.56 CONFIG_RF_FRONTEND Register (Offset = 354h) [reset = X]
CONFIG_RF_FRONTEND is shown in Figure 9-77 and described in Table 9-79.
Configuration of RF Frontend in Divide-by-2 Mode
Figure 9-77. CONFIG_RF_FRONTEND Register
31 30 29 28 27 26 25 24
IFAMP_IB LNA_IB
R-7h R-0h
23 22 21 20 19 18 17 16
IFAMP_TRIM CTL_PA0_TRIM
R-X R-0h
15 14 13 12 11 10 9 8
CTL_PA0_TRIM PATRIMCOMP RESERVED
LETE_N
R-0h R-0h R-3Fh
7 6 5 4 3 2 1 0
RESERVED RFLDO_TRIM_OUTPUT
R-3Fh R-0h
Table 9-79. CONFIG_RF_FRONTEND Register Field Descriptions
Bit Field Type Reset Description
31-28 IFAMP_IB R 7h
Trim value for ADI_0_RF:IFAMPCTL3.IB. Value is read by RF Core
ROM FW during RF Core initialization.
27-24 LNA_IB R 0h
Trim value for ADI_0_RF:LNACTL2.IB. Value is read by RF Core
ROM FW during RF Core initialization.
Reset holds trim value from production test.
23-19 IFAMP_TRIM R X
Trim value for ADI_0_RF:IFAMPCTL0.TRIM. Value is read by RF
Core ROM FW during RF Core initialization.
18-14 CTL_PA0_TRIM R 0h
Trim value for ADI_0_RF:PACTL0.TRIM. Value is read by RF Core
ROM FW during RF Core initialization.
Reset holds trim value from production test.
13 PATRIMCOMPLETE_N R 0h
Status of PA trim 0: Trimmed 1: Not trimmed
Reset holds trim value from production test.
12-7 RESERVED R 3Fh
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
6-0 RFLDO_TRIM_OUTPUT R 0h
Trim value for ADI_0_RF:RFLDO1.TRIM_OUT. Value is read by RF
Core ROM FW during RF Core initialization.
Reset holds trim value from production test.
773
SWCU117A–February 2015–Revised March 2015 Device Configuration
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