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Factory Configuration (FCFG)

9.2.1.48 RCOSC_HF_TEMPCOMP Register (Offset = 310h) [reset = X]

RCOSC_HF_TEMPCOMP is shown in Figure 9-69 and described in Table 9-71.

RCOSC HF Temperature Compensation

Figure 9-69. RCOSC_HF_TEMPCOMP Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

FINE_RESISTOR CTRIM

R-X R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CTRIMFRACT_QUAD CTRIMFRACT_SLOPE

R-X R-3h

Table 9-71. RCOSC_HF_TEMPCOMP Register Field Descriptions

Bit Field Type Reset Description

31-24 FINE_RESISTOR R X

Change in FINE_RESISTOR trim

23-16 CTRIM R X

Change in CTRIM trim

15-8 CTRIMFRACT_QUAD R X

Temp compensation quadratic CTRIMFRACT

7-0 CTRIMFRACT_SLOPE R 3h

Number of CTRIMFRACT codes per 20 degrees C from default

temperature

765

SWCU117A–February 2015–Revised March 2015 Device Configuration

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