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9.2.1.44 MAC_15_4_0 Register (Offset = 2F0h) [reset = 0h]
MAC_15_4_0 is shown in Figure 9-65 and described in Table 9-67.
MAC IEEE 802.15.4 Address 0
Figure 9-65. MAC_15_4_0 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ADDR_0_31
R-0h
Table 9-67. MAC_15_4_0 Register Field Descriptions
Bit Field Type Reset Description
31-0 ADDR_0_31 R 0h
The first 32-bits of the 64-bit MAC 15.4 address
Reset holds trim value from production test.
760
Device Configuration SWCU117A–February 2015–Revised March 2015
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