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Factory Configuration (FCFG)

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9.2.1.42 MAC_BLE_0 Register (Offset = 2E8h) [reset = 0h]

MAC_BLE_0 is shown in Figure 9-63 and described in Table 9-65.

MAC BLE Address 0

Figure 9-63. MAC_BLE_0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ADDR_0_31

R-0h

Table 9-65. MAC_BLE_0 Register Field Descriptions

Bit Field Type Reset Description

31-0 ADDR_0_31 R 0h

The first 32-bits of the 64-bit MAC BLE address

Reset holds trim value from production test.

758

Device Configuration SWCU117A–February 2015–Revised March 2015

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