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Factory Configuration (FCFG)

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9.2.1.27 FLASH_E_P Register (Offset = 170h) [reset = 17331A33h]

FLASH_E_P is shown in Figure 9-48 and described in Table 9-50.

Flash Erase and Program Setup Time

Figure 9-48. FLASH_E_P Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

PSU ESU PVSU EVSU

R-17h R-33h R-1Ah R-33h

Table 9-50. FLASH_E_P Register Field Descriptions

Bit Field Type Reset Description

31-24 PSU R 17h

Program setup time in cycles. Value will be written to

FLASH:FSM_PE_OSU.PGM_OSU by the flash device driver when

an erase/program operation is initiated.

23-16 ESU R 33h

Erase setup time in cycles. Value will be written to

FLASH:FSM_PE_OSU.ERA_OSU by the flash device driver when

an erase/program operation is initiated.

15-8 PVSU R 1Ah

Program verify setup time in cycles. Value will be written to

FLASH:FSM_PE_VSU.PGM_VSU by the flash device driver when

an erase/program operation is initiated.

7-0 EVSU R 33h

Erase verify setup time in cycles. Value will be written to

FLASH:FSM_PE_VSU.ERA_VSU by the flash device driver when an

erase/program operation is initiated.

742

Device Configuration SWCU117A–February 2015–Revised March 2015

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