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9.1.1.20 CCFG_PROT_95_64 Register (Offset = FF8h) [reset = FFFFFFFFh]
CCFG_PROT_95_64 is shown in Figure 9-20 and described in Table 9-21.
Protect Sectors 64-95 Each bit write protects one sector from being both programmed and erased. Bit
must be set to 0 in order to enable sector write protect. Not in use on CC26xx.
Figure 9-20. CCFG_PROT_95_64 Register
31 30 29 28 27 26 25 24
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_95 EC_94 EC_93 EC_92 EC_91 EC_90 EC_89 EC_88
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
23 22 21 20 19 18 17 16
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_87 EC_86 EC_85 EC_84 EC_83 EC_82 EC_81 EC_80
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
15 14 13 12 11 10 9 8
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_79 EC_78 EC_77 EC_76 EC_75 EC_74 EC_73 EC_72
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
7 6 5 4 3 2 1 0
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_71 EC_70 EC_69 EC_68 EC_67 EC_66 EC_65 EC_64
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
Table 9-21. CCFG_PROT_95_64 Register Field Descriptions
Bit Field Type Reset Description
31 WRT_PROT_SEC_95 R/W 1h
0: Sector protected
30 WRT_PROT_SEC_94 R/W 1h
0: Sector protected
29 WRT_PROT_SEC_93 R/W 1h
0: Sector protected
28 WRT_PROT_SEC_92 R/W 1h
0: Sector protected
27 WRT_PROT_SEC_91 R/W 1h
0: Sector protected
26 WRT_PROT_SEC_90 R/W 1h
0: Sector protected
25 WRT_PROT_SEC_89 R/W 1h
0: Sector protected
24 WRT_PROT_SEC_88 R/W 1h
0: Sector protected
23 WRT_PROT_SEC_87 R/W 1h
0: Sector protected
22 WRT_PROT_SEC_86 R/W 1h
0: Sector protected
21 WRT_PROT_SEC_85 R/W 1h
0: Sector protected
20 WRT_PROT_SEC_84 R/W 1h
0: Sector protected
19 WRT_PROT_SEC_83 R/W 1h
0: Sector protected
18 WRT_PROT_SEC_82 R/W 1h
0: Sector protected
17 WRT_PROT_SEC_81 R/W 1h
0: Sector protected
16 WRT_PROT_SEC_80 R/W 1h
0: Sector protected
15 WRT_PROT_SEC_79 R/W 1h
0: Sector protected
14 WRT_PROT_SEC_78 R/W 1h
0: Sector protected
13 WRT_PROT_SEC_77 R/W 1h
0: Sector protected
12 WRT_PROT_SEC_76 R/W 1h
0: Sector protected
11 WRT_PROT_SEC_75 R/W 1h
0: Sector protected
10 WRT_PROT_SEC_74 R/W 1h
0: Sector protected
710
Device Configuration SWCU117A–February 2015–Revised March 2015
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