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9.1.1.19 CCFG_PROT_63_32 Register (Offset = FF4h) [reset = FFFFFFFFh]
CCFG_PROT_63_32 is shown in Figure 9-19 and described in Table 9-20.
Protect Sectors 32-63 Each bit write protects one sector from being both programmed and erased. Bit
must be set to 0 in order to enable sector write protect. The sector write protection is enabled by setting
corresponding bit in the FSM_BSLE1- and FSM_BSLP1-registers in the flash controller. These registers
are not in use by CC26xx.
Figure 9-19. CCFG_PROT_63_32 Register
31 30 29 28 27 26 25 24
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_63 EC_62 EC_61 EC_60 EC_59 EC_58 EC_57 EC_56
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
23 22 21 20 19 18 17 16
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_55 EC_54 EC_53 EC_52 EC_51 EC_50 EC_49 EC_48
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
15 14 13 12 11 10 9 8
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_47 EC_46 EC_45 EC_44 EC_43 EC_42 EC_41 EC_40
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
7 6 5 4 3 2 1 0
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_39 EC_38 EC_37 EC_36 EC_35 EC_34 EC_33 EC_32
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
Table 9-20. CCFG_PROT_63_32 Register Field Descriptions
Bit Field Type Reset Description
31 WRT_PROT_SEC_63 R/W 1h
0: Sector protected
30 WRT_PROT_SEC_62 R/W 1h
0: Sector protected
29 WRT_PROT_SEC_61 R/W 1h
0: Sector protected
28 WRT_PROT_SEC_60 R/W 1h
0: Sector protected
27 WRT_PROT_SEC_59 R/W 1h
0: Sector protected
26 WRT_PROT_SEC_58 R/W 1h
0: Sector protected
25 WRT_PROT_SEC_57 R/W 1h
0: Sector protected
24 WRT_PROT_SEC_56 R/W 1h
0: Sector protected
23 WRT_PROT_SEC_55 R/W 1h
0: Sector protected
22 WRT_PROT_SEC_54 R/W 1h
0: Sector protected
21 WRT_PROT_SEC_53 R/W 1h
0: Sector protected
20 WRT_PROT_SEC_52 R/W 1h
0: Sector protected
19 WRT_PROT_SEC_51 R/W 1h
0: Sector protected
18 WRT_PROT_SEC_50 R/W 1h
0: Sector protected
17 WRT_PROT_SEC_49 R/W 1h
0: Sector protected
16 WRT_PROT_SEC_48 R/W 1h
0: Sector protected
15 WRT_PROT_SEC_47 R/W 1h
0: Sector protected
14 WRT_PROT_SEC_46 R/W 1h
0: Sector protected
13 WRT_PROT_SEC_45 R/W 1h
0: Sector protected
12 WRT_PROT_SEC_44 R/W 1h
0: Sector protected
11 WRT_PROT_SEC_43 R/W 1h
0: Sector protected
708
Device Configuration SWCU117A–February 2015–Revised March 2015
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