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Customer Configuration (CCFG) www.ti.com
9.1.1.18 CCFG_PROT_31_0 Register (Offset = FF0h) [reset = FFFFFFFFh]
CCFG_PROT_31_0 is shown in Figure 9-18 and described in Table 9-19.
Protect Sectors 0-31 Each bit write protects one sector from being both programmed and erased. Bit must
be set to 0 in order to enable sector write protect. The sector write protection is enabled by setting
corresponding bit in the FSM_BSLE0- and FSM_BSLP0-registers in the flash controller.
Figure 9-18. CCFG_PROT_31_0 Register
31 30 29 28 27 26 25 24
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_31 EC_30 EC_29 EC_28 EC_27 EC_26 EC_25 EC_24
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
23 22 21 20 19 18 17 16
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_23 EC_22 EC_21 EC_20 EC_19 EC_18 EC_17 EC_16
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
15 14 13 12 11 10 9 8
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_15 EC_14 EC_13 EC_12 EC_11 EC_10 EC_9 EC_8
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
7 6 5 4 3 2 1 0
WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S WRT_PROT_S
EC_7 EC_6 EC_5 EC_4 EC_3 EC_2 EC_1 EC_0
R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h R/W-1h
Table 9-19. CCFG_PROT_31_0 Register Field Descriptions
Bit Field Type Reset Description
31 WRT_PROT_SEC_31 R/W 1h
0: Sector protected
30 WRT_PROT_SEC_30 R/W 1h
0: Sector protected
29 WRT_PROT_SEC_29 R/W 1h
0: Sector protected
28 WRT_PROT_SEC_28 R/W 1h
0: Sector protected
27 WRT_PROT_SEC_27 R/W 1h
0: Sector protected
26 WRT_PROT_SEC_26 R/W 1h
0: Sector protected
25 WRT_PROT_SEC_25 R/W 1h
0: Sector protected
24 WRT_PROT_SEC_24 R/W 1h
0: Sector protected
23 WRT_PROT_SEC_23 R/W 1h
0: Sector protected
22 WRT_PROT_SEC_22 R/W 1h
0: Sector protected
21 WRT_PROT_SEC_21 R/W 1h
0: Sector protected
20 WRT_PROT_SEC_20 R/W 1h
0: Sector protected
19 WRT_PROT_SEC_19 R/W 1h
0: Sector protected
18 WRT_PROT_SEC_18 R/W 1h
0: Sector protected
17 WRT_PROT_SEC_17 R/W 1h
0: Sector protected
16 WRT_PROT_SEC_16 R/W 1h
0: Sector protected
15 WRT_PROT_SEC_15 R/W 1h
0: Sector protected
14 WRT_PROT_SEC_14 R/W 1h
0: Sector protected
13 WRT_PROT_SEC_13 R/W 1h
0: Sector protected
12 WRT_PROT_SEC_12 R/W 1h
0: Sector protected
11 WRT_PROT_SEC_11 R/W 1h
0: Sector protected
706
Device Configuration SWCU117A–February 2015–Revised March 2015
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