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Customer Configuration (CCFG)

9.1.1.15 CCFG_TAP_DAP_0 Register (Offset = FE4h) [reset = FFC5C5C5h]

CCFG_TAP_DAP_0 is shown in Figure 9-15 and described in Table 9-16.

Test Access Points Enable 0

Figure 9-15. CCFG_TAP_DAP_0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED CPU_DAP_ENABLE

R/W-FFh R/W-C5h

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

PRCM_TAP_ENABLE TEST_TAP_ENABLE

R/W-C5h R/W-C5h

Table 9-16. CCFG_TAP_DAP_0 Register Field Descriptions

Bit Field Type Reset Description

31-24 RESERVED R/W FFh

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

23-16 CPU_DAP_ENABLE R/W C5h

Enable CPU DAP. 0xC5: AON_WUC:JTAGCFG.CPU_DAP will be

set to 1 by boot FW while in safezone. Any other value:

AON_WUC:JTAGCFG.CPU_DAP will be set to 0 by boot FW while

in safezone.

15-8 PRCM_TAP_ENABLE R/W C5h

Enable PRCM TAP. 0xC5: AON_WUC:JTAGCFG.PRCM_TAP will

be set to 1 by boot FW while in safezone. Any other value:

AON_WUC:JTAGCFG.PRCM_TAP will be set to 0 by boot FW while

in safezone.

7-0 TEST_TAP_ENABLE R/W C5h

Enable Test TAP. 0xC5: AON_WUC:JTAGCFG.TEST_TAP will be

set to 1 by boot FW while in safezone. Any other value:

AON_WUC:JTAGCFG.TEST_TAP will be set to 0 by boot FW while

in safezone.

703

SWCU117A–February 2015–Revised March 2015 Device Configuration

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