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7.8 ROM Functions
Overview of memory contents:
• eFuse
– Contains mostly critical chip-trim items needed before bootloader starts
– Interfaced through the Flash module in the digital core
• Flash trim
• Ram repair
• Analog trim (bandgap, brown-out, selected regulators, internal 48-MHz RC Oscillator)
• JTAG TAP/DAP lock
• CRC check (8 bits)
– The only critical item here is the JTAG TAP/DAP lock that is locked by default (if a fuse is blown).
• FCFG:
– Currently a separate Flash block
– All trims plus entire device configuration
• Flash trim to support erase/write
• Module trim (analog, RF +++)
• Chip configuration (ID, device type, package size, pinout++, production test data)
• Bootloader configuration
• Security
• TI FA Analysis option
• JTAG TAP/DAP lock override
• Bootloader enable
• Customer configuration (last page in flash):
– Bootloader disable
– JTAG DAP/TAP disable
– TI FA analysis disable
– Customer configuration area write or erase protection
– Other configuration not related to security
Configuration memory:
• RO
– OTP, 1-Kbyte read interface (write through FMC)
• RO
– ENGR 1-kByte read interface (write through FMC)
• CCFG
– FLASH sector 4-kByte read interface (write through FMC)
• RO
– EFUSE, only accessible through MMR interface
The ROM is preprogrammed with a serial bootloader (SPI or UART). For applications that require in-field
programmability, the royalty-free bootloader acts as an application loader and supports in-field firmware
updates. The bootloader either executes automatically if no valid image has been written to the flash, or
the bootloader may be started through a configurable GPIO backdoor. The bootloader may not be called
from application code.
669
SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)
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