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7.7.2.113 FCFG_WRAPPER Register (Offset = 2404h) [reset = X]
FCFG_WRAPPER is shown in Figure 7-123 and described in Table 7-120.
Internal. Only to be used through TI provided API.
Figure 7-123. FCFG_WRAPPER Register
31 30 29 28 27 26 25 24
FAMILY_TYPE
R-50h
23 22 21 20 19 18 17 16
RESERVED MEM_MAP CPU2
R-X R-X R-X
15 14 13 12 11 10 9 8
EE_IN_MAIN ROM IFLUSH SIL3 ECCA
R-9h R-X R-X R-X R-X
7 6 5 4 3 2 1 0
AUTO_SUSP UERR CPU_TYPE1
R-X R-X R-7h
Table 7-120. FCFG_WRAPPER Register Field Descriptions
Bit Field Type Reset Description
31-24 FAMILY_TYPE R 50h
Internal. Only to be used through TI provided API.
23-21 RESERVED R X
Internal. Only to be used through TI provided API.
20 MEM_MAP R X
Internal. Only to be used through TI provided API.
19-16 CPU2 R X
Internal. Only to be used through TI provided API.
15-12 EE_IN_MAIN R 9h
Internal. Only to be used through TI provided API.
11 ROM R X
Internal. Only to be used through TI provided API.
10 IFLUSH R X
Internal. Only to be used through TI provided API.
9 SIL3 R X
Internal. Only to be used through TI provided API.
8 ECCA R X
Internal. Only to be used through TI provided API.
7-6 AUTO_SUSP R X
Internal. Only to be used through TI provided API.
5-4 UERR R X
Internal. Only to be used through TI provided API.
3-0 CPU_TYPE1 R 7h
Internal. Only to be used through TI provided API.
658
Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015
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