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7.7.2.111 FSM_BSLP1 Register (Offset = 22F4h) [reset = X]
FSM_BSLP1 is shown in Figure 7-121 and described in Table 7-118.
Internal. Only to be used through TI provided API.
Figure 7-121. FSM_BSLP1 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FSM_BSL1
R/W-X
Table 7-118. FSM_BSLP1 Register Field Descriptions
Bit Field Type Reset Description
31-0 FSM_BSL1 R/W X
Internal. Only to be used through TI provided API.
656
Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015
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