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VIMS Registers

7.7.2.110 FSM_BSLP0 Register (Offset = 22F0h) [reset = X]

FSM_BSLP0 is shown in Figure 7-120 and described in Table 7-117.

Internal. Only to be used through TI provided API.

Figure 7-120. FSM_BSLP0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

FSM_BSLP0

R/W-X

Table 7-117. FSM_BSLP0 Register Field Descriptions

Bit Field Type Reset Description

31-0 FSM_BSLP0 R/W X

Internal. Only to be used through TI provided API.

655

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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