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VIMS Registers

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7.7.2.103 FSM_ERR_ADDR Register (Offset = 22ACh) [reset = X]

FSM_ERR_ADDR is shown in Figure 7-113 and described in Table 7-110.

Internal. Only to be used through TI provided API.

Figure 7-113. FSM_ERR_ADDR Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

FSM_ERR_ADDR

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

FSM_ERR_ADDR RESERVED FSM_ERR_BANK

R-X R-X R-X

Table 7-110. FSM_ERR_ADDR Register Field Descriptions

Bit Field Type Reset Description

31-8 FSM_ERR_ADDR R X

Internal. Only to be used through TI provided API.

7-4 RESERVED R X

Internal. Only to be used through TI provided API.

3-0 FSM_ERR_BANK R X

Internal. Only to be used through TI provided API.

648

Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015

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