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VIMS Registers

7.7.2.100 FSM_ADDR Register (Offset = 22A0h) [reset = X]

FSM_ADDR is shown in Figure 7-110 and described in Table 7-107.

Internal. Only to be used through TI provided API.

Figure 7-110. FSM_ADDR Register

31 30 29 28 27 26 25 24

RESERVED BANK CUR_ADDR

R-X R-X R-X

23 22 21 20 19 18 17 16

CUR_ADDR

R-X

15 14 13 12 11 10 9 8

CUR_ADDR

R-X

7 6 5 4 3 2 1 0

CUR_ADDR

R-X

Table 7-107. FSM_ADDR Register Field Descriptions

Bit Field Type Reset Description

31 RESERVED R X

Internal. Only to be used through TI provided API.

30-28 BANK R X

Internal. Only to be used through TI provided API.

27-0 CUR_ADDR R X

Internal. Only to be used through TI provided API.

645

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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