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VIMS Registers

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7.7.2.97 FSM_WR_ENA Register (Offset = 2288h) [reset = X]

FSM_WR_ENA is shown in Figure 7-107 and described in Table 7-104.

Internal. Only to be used through TI provided API.

Figure 7-107. FSM_WR_ENA Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED WR_ENA

R-X R/W-2h

Table 7-104. FSM_WR_ENA Register Field Descriptions

Bit Field Type Reset Description

31-3 RESERVED R X

Internal. Only to be used through TI provided API.

2-0 WR_ENA R/W 2h

Internal. Only to be used through TI provided API.

642

Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015

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