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VIMS Registers

7.7.2.88 FSM_PGM Register (Offset = 2260h) [reset = X]

FSM_PGM is shown in Figure 7-98 and described in Table 7-95.

Internal. Only to be used through TI provided API.

Figure 7-98. FSM_PGM Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED PGM_BANK PGM_ADDR

R-X R-X R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

PGM_ADDR

R-X

Table 7-95. FSM_PGM Register Field Descriptions

Bit Field Type Reset Description

31-26 RESERVED R X

Internal. Only to be used through TI provided API.

25-23 PGM_BANK R X

Internal. Only to be used through TI provided API.

22-0 PGM_ADDR R X

Internal. Only to be used through TI provided API.

633

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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