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7.7.2.87 FSM_MODE Register (Offset = 225Ch) [reset = X]
FSM_MODE is shown in Figure 7-97 and described in Table 7-94.
Internal. Only to be used through TI provided API.
Figure 7-97. FSM_MODE Register
31 30 29 28 27 26 25 24
RESERVED
R-X
23 22 21 20 19 18 17 16
RESERVED RDV_SUBMODE PGM_SUBMODE
R-X R-X R-X
15 14 13 12 11 10 9 8
ERA_SUBMODE SUBMODE SAV_PGM_CMD SAV_ERA_MO
DE
R-X R-X R-X R-X
7 6 5 4 3 2 1 0
SAV_ERA_MODE MODE CMD
R-X R-X R-X
Table 7-94. FSM_MODE Register Field Descriptions
Bit Field Type Reset Description
31-20 RESERVED R X
Internal. Only to be used through TI provided API.
19-18 RDV_SUBMODE R X
Internal. Only to be used through TI provided API.
17-16 PGM_SUBMODE R X
Internal. Only to be used through TI provided API.
15-14 ERA_SUBMODE R X
Internal. Only to be used through TI provided API.
13-12 SUBMODE R X
Internal. Only to be used through TI provided API.
11-9 SAV_PGM_CMD R X
Internal. Only to be used through TI provided API.
8-6 SAV_ERA_MODE R X
Internal. Only to be used through TI provided API.
5-3 MODE R X
Internal. Only to be used through TI provided API.
2-0 CMD R X
Internal. Only to be used through TI provided API.
632
Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015
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