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VIMS Registers

7.7.2.76 FSM_CMP_VSU Register (Offset = 221Ch) [reset = X]

FSM_CMP_VSU is shown in Figure 7-86 and described in Table 7-83.

Internal. Only to be used through TI provided API.

Figure 7-86. FSM_CMP_VSU Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ADD_EXZ RESERVED

R/W-X R-X

Table 7-83. FSM_CMP_VSU Register Field Descriptions

Bit Field Type Reset Description

31-16 RESERVED R X

Internal. Only to be used through TI provided API.

15-12 ADD_EXZ R/W X

Internal. Only to be used through TI provided API.

11-0 RESERVED R X

Internal. Only to be used through TI provided API.

621

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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