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VIMS Registers

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7.7.2.75 FSM_PE_VSU Register (Offset = 2218h) [reset = X]

FSM_PE_VSU is shown in Figure 7-85 and described in Table 7-82.

Internal. Only to be used through TI provided API.

Figure 7-85. FSM_PE_VSU Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED PGM_VSU ERA_VSU

R-X R/W-X R/W-X

Table 7-82. FSM_PE_VSU Register Field Descriptions

Bit Field Type Reset Description

31-16 RESERVED R X

Internal. Only to be used through TI provided API.

15-8 PGM_VSU R/W X

Internal. Only to be used through TI provided API.

7-0 ERA_VSU R/W X

Internal. Only to be used through TI provided API.

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Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015

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