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7.7.2.70 FSM_STATE Register (Offset = 2204h) [reset = X]
FSM_STATE is shown in Figure 7-80 and described in Table 7-77.
Internal. Only to be used through TI provided API.
Figure 7-80. FSM_STATE Register
31 30 29 28 27 26 25 24
RESERVED
R-X
23 22 21 20 19 18 17 16
RESERVED
R-X
15 14 13 12 11 10 9 8
RESERVED CTRLENZ EXECUTEZ RESERVED FSM_ACT
R-X R-1h R-1h R-X R-X
7 6 5 4 3 2 1 0
TIOTP_ACT OTP_ACT RESERVED
R-X R-X R-X
Table 7-77. FSM_STATE Register Field Descriptions
Bit Field Type Reset Description
31-12 RESERVED R X
Internal. Only to be used through TI provided API.
11 CTRLENZ R 1h
Internal. Only to be used through TI provided API.
10 EXECUTEZ R 1h
Internal. Only to be used through TI provided API.
9 RESERVED R X
Internal. Only to be used through TI provided API.
8 FSM_ACT R X
Internal. Only to be used through TI provided API.
7 TIOTP_ACT R X
Internal. Only to be used through TI provided API.
6 OTP_ACT R X
Internal. Only to be used through TI provided API.
5-0 RESERVED R X
Internal. Only to be used through TI provided API.
615
SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)
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