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7.7.2.53 FBSTROBES Register (Offset = 2100h) [reset = X]
FBSTROBES is shown in Figure 7-63 and described in Table 7-60.
Internal. Only to be used through TI provided API.
Figure 7-63. FBSTROBES Register
31 30 29 28 27 26 25 24
RESERVED ECBIT
R-X R/W-X
23 22 21 20 19 18 17 16
RESERVED RWAIT2_FLCL RWAIT_FLCLK FLCLKEN
K
R-X R/W-X R/W-X R/W-X
15 14 13 12 11 10 9 8
RESERVED CTRLENZ
R-X R/W-1h
7 6 5 4 3 2 1 0
RESERVED NOCOLRED PRECOL TI_OTP OTP TEZ RESERVED
R-X R/W-X R/W-X R/W-X R/W-X R/W-1h R-X
Table 7-60. FBSTROBES Register Field Descriptions
Bit Field Type Reset Description
31-25 RESERVED R X
Internal. Only to be used through TI provided API.
24 ECBIT R/W X
Internal. Only to be used through TI provided API.
23-19 RESERVED R X
Internal. Only to be used through TI provided API.
18 RWAIT2_FLCLK R/W X
Internal. Only to be used through TI provided API.
17 RWAIT_FLCLK R/W X
Internal. Only to be used through TI provided API.
16 FLCLKEN R/W X
Internal. Only to be used through TI provided API.
15-9 RESERVED R X
Internal. Only to be used through TI provided API.
8 CTRLENZ R/W 1h
Internal. Only to be used through TI provided API.
7 RESERVED R X
Internal. Only to be used through TI provided API.
6 NOCOLRED R/W X
Internal. Only to be used through TI provided API.
5 PRECOL R/W X
Internal. Only to be used through TI provided API.
4 TI_OTP R/W X
Internal. Only to be used through TI provided API.
3 OTP R/W X
Internal. Only to be used through TI provided API.
2 TEZ R/W 1h
Internal. Only to be used through TI provided API.
1-0 RESERVED R X
Internal. Only to be used through TI provided API.
598
Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015
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