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VIMS Registers
7.7.2.52 FSEQPMP Register (Offset = 20A8h) [reset = X]
FSEQPMP is shown in Figure 7-62 and described in Table 7-59.
Internal. Only to be used through TI provided API.
Figure 7-62. FSEQPMP Register
31 30 29 28 27 26 25 24
RESERVED TRIM_3P4
R/W-8h R/W-5h
23 22 21 20 19 18 17 16
RESERVED TRIM_1P7 TRIM_0P8
R-X R/W-X R/W-8h
15 14 13 12 11 10 9 8
RESERVED VIN_AT_X RESERVED VIN_BY_PASS
R-X R/W-X R-X R/W-X
7 6 5 4 3 2 1 0
SEQ_PUMP
R/W-X
Table 7-59. FSEQPMP Register Field Descriptions
Bit Field Type Reset Description
31-28 RESERVED R/W 8h
Internal. Only to be used through TI provided API.
27-24 TRIM_3P4 R/W 5h
Internal. Only to be used through TI provided API.
23-22 RESERVED R X
Internal. Only to be used through TI provided API.
21-20 TRIM_1P7 R/W X
Internal. Only to be used through TI provided API.
19-16 TRIM_0P8 R/W 8h
Internal. Only to be used through TI provided API.
15 RESERVED R X
Internal. Only to be used through TI provided API.
14-12 VIN_AT_X R/W X
Internal. Only to be used through TI provided API.
11-9 RESERVED R X
Internal. Only to be used through TI provided API.
8 VIN_BY_PASS R/W X
Internal. Only to be used through TI provided API.
7-0 SEQ_PUMP R/W X
Internal. Only to be used through TI provided API.
597
SWCU117AFebruary 2015Revised March 2015 Versatile Instruction Memory System (VIMS)
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