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VIMS Registers

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7.7.2.29 FEDACCTL1 Register (Offset = 2008h) [reset = X]

FEDACCTL1 is shown in Figure 7-39 and described in Table 7-36.

Internal. Only to be used through TI provided API.

Figure 7-39. FEDACCTL1 Register

31 30 29 28 27 26 25 24

RESERVED SUSP_IGNR

R-X R/W-X

23 22 21 20 19 18 17 16

EDACEN

R-X

15 14 13 12 11 10 9 8

EDACEN

R-X

7 6 5 4 3 2 1 0

EDACEN

R-X

Table 7-36. FEDACCTL1 Register Field Descriptions

Bit Field Type Reset Description

31-25 RESERVED R X

Internal. Only to be used through TI provided API.

24 SUSP_IGNR R/W X

Internal. Only to be used through TI provided API.

23-0 EDACEN R X

Internal. Only to be used through TI provided API.

574

Versatile Instruction Memory System (VIMS) SWCU117A–February 2015–Revised March 2015

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