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VIMS Registers

7.7.2.28 FSPRD Register (Offset = 2004h) [reset = X]

FSPRD is shown in Figure 7-38 and described in Table 7-35.

Internal. Only to be used through TI provided API.

Figure 7-38. FSPRD Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

DIS_PREEMPT

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RMBSEM RESERVED RM1 RM0

R/W-X R-X R/W-X R/W-X

Table 7-35. FSPRD Register Field Descriptions

Bit Field Type Reset Description

31-16 DIS_PREEMPT R X

Internal. Only to be used through TI provided API.

15-8 RMBSEM R/W X

Internal. Only to be used through TI provided API.

7-2 RESERVED R X

Internal. Only to be used through TI provided API.

1 RM1 R/W X

Internal. Only to be used through TI provided API.

0 RM0 R/W X

Internal. Only to be used through TI provided API.

573

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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