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VIMS Registers
7.7.2.8 EFUSEADDR Register (Offset = 1004h) [reset = X]
EFUSEADDR is shown in Figure 7-18 and described in Table 7-15.
Internal. Only to be used through TI provided API.
Figure 7-18. EFUSEADDR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED BLOCK ROW
R-X R/W-X R/W-X
Table 7-15. EFUSEADDR Register Field Descriptions
Bit Field Type Reset Description
31-16 RESERVED R X
Internal. Only to be used through TI provided API.
15-11 BLOCK R/W X
Internal. Only to be used through TI provided API.
10-0 ROW R/W X
Internal. Only to be used through TI provided API.
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SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)
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