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FLASH

7.6.2.1 Disabling Debug Access

TBD

7.6.3 FLASH Memory Programming

During a flash memory write or erase operation, the Flash memory must not be read. If instruction

execution is required during a flash memory operation, the executing code must be placed in SRAM (and

executed from SRAM) while the flash operation is in progress.

7.6.4 FLASH Read Timings

TBD

7.6.5 Power Mode Operations

TBD

7.7 VIMS Registers

541

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

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