User manual

dcode

sysbus

decoder

bus

Cache

ROM

Flash

bus

icode

Chapter 7

SWCU117A–February 2015–Revised March 2015

Versatile Instruction Memory System (VIMS)

The main instruction memories are encapsulated in a Versatile Instruction Memory System (VIMS)

module, which includes the following memories:

• 128-kB FLASH

• 8-kB RAM Cache or general purpose RAM (GPRAM)

• 115-kB Boot ROM

An overview of the VIMS module is shown in Figure 7-1.

Figure 7-1. VIMS Overview

The VIMS module forwards CPU accesses (icode/dcode) and system bus accesses to the addressed

memories; the VIMS module also arbitrates access between the CPU and the system bus.

The VIMS module runs on the 48-MHz system clock.

The flash memory is programmable from user software, from the debug interface, and from the ROM

bootloader. The RAM block can be used as a cache for the Flash block or as general purpose RAM.

529

SWCU117A–February 2015–Revised March 2015 Versatile Instruction Memory System (VIMS)

Submit Documentation Feedback