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6.2.4.15 STAT1 Register (Offset = 38h) [reset = X]
STAT1 is shown in Figure 6-95 and described in Table 6-100.
Status 1 This register contains status signals from OSC_DIG
Figure 6-95. STAT1 Register
31 30 29 28 27 26 25 24
RAMPSTATE HMP_UPDATE_AMP
R-X R-X
23 22 21 20 19 18 17 16
HMP_UPDATE_AMP LPM_UPDATE_AMP
R-X R-X
15 14 13 12 11 10 9 8
FORCE_RCOS SCLK_HF_EN SCLK_MF_EN ACLK_ADC_E ACLK_TDC_E ACLK_REF_EN CLK_CHP_EN CLK_DCDC_E
C_HF N N N
R-X R-X R-X R-X R-X R-X R-X R-X
7 6 5 4 3 2 1 0
SCLK_HF_GO SCLK_MF_GO SCLK_LF_GO ACLK_ADC_G ACLK_TDC_G ACLK_REF_G CLK_CHP_GO CLK_DCDC_G
OD OD OD OOD OOD OOD OD OOD
R-X R-X R-X R-X R-X R-X R-X R-X
Table 6-100. STAT1 Register Field Descriptions
Bit Field Type Reset Description
31-28 RAMPSTATE R X
AMPCOMP FSM State
0h = RESET
1h = INITIALIZATION
2h = HPM_RAMP1
3h = HPM_RAMP2
4h = HPM_RAMP3
5h = HPM_UPDATE
6h = IDAC_INCREMENT
7h = IBIAS_CAP_UPDATE
8h = IBIAS_DECREMENT_WITH_MEASURE
9h = LPM_UPDATE
Ah = IBIAS_INCREMENT
Bh = IDAC_DECREMENT_WITH_MEASURE
Ch = DUMMY_TO_INIT_1
Dh = FAST_START
Eh = FAST_START_SETTLE
27-22 HMP_UPDATE_AMP R X
OSC amplitude during HPM_UPDATE state. The vaue is an
unsigned interger. It is used for debug only.
21-16 LPM_UPDATE_AMP R X
OSC amplitude during LPM_UPDATE state The vaue is an unsigned
interger. It is used for debug only.
15 FORCE_RCOSC_HF R X
force_rcosc_hf
14 SCLK_HF_EN R X
SCLK_HF_EN
13 SCLK_MF_EN R X
SCLK_MF_EN
12 ACLK_ADC_EN R X
ACLK_ADC_EN
11 ACLK_TDC_EN R X
ACLK_TDC_EN
10 ACLK_REF_EN R X
ACLK_REF_EN
9 CLK_CHP_EN R X
CLK_CHP_EN
8 CLK_DCDC_EN R X
CLK_DCDC_EN
7 SCLK_HF_GOOD R X
SCLK_HF_GOOD
526
Power, Reset, and Clock Management SWCU117A–February 2015–Revised March 2015
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