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PRCM Registers

6.2.4.13 RCOSCHFCTL Register (Offset = 30h) [reset = X]

RCOSCHFCTL is shown in Figure 6-93 and described in Table 6-98.

RCOSCHF Control

Figure 6-93. RCOSCHFCTL Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R/W-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RCOSCHF_CTRIM RESERVED

R/W-X R/W-X

Table 6-98. RCOSCHFCTL Register Field Descriptions

Bit Field Type Reset Description

31-16 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

15-8 RCOSCHF_CTRIM R/W X

Internal. Only to be used through TI provided API.

7-0 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

523

SWCU117A–February 2015–Revised March 2015 Power, Reset, and Clock Management

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