User manual
PRCM Registers
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6.2.4.12 LFOSCCTL Register (Offset = 2Ch) [reset = X]
LFOSCCTL is shown in Figure 6-92 and described in Table 6-97.
Low Frequency Oscillator Control
Figure 6-92. LFOSCCTL Register
31 30 29 28 27 26 25 24
RESERVED
R/W-X
23 22 21 20 19 18 17 16
XOSCLF_REGULATOR_TRIM XOSCLF_CMIRRWR_RATIO RESERVED
R/W-X R/W-X R/W-X
15 14 13 12 11 10 9 8
RESERVED RCOSCLF_RTUNE_TRIM
R/W-X R/W-X
7 6 5 4 3 2 1 0
RCOSCLF_CTUNE_TRIM
R/W-X
Table 6-97. LFOSCCTL Register Field Descriptions
Bit Field Type Reset Description
31-24 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
23-22 XOSCLF_REGULATOR_ R/W X
Internal. Only to be used through TI provided API.
TRIM
21-18 XOSCLF_CMIRRWR_RA R/W X
Internal. Only to be used through TI provided API.
TIO
17-10 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
9-8 RCOSCLF_RTUNE_TRIM R/W X
Internal. Only to be used through TI provided API.
0h = 7P5MEG : Internal. Only to be used through TI provided API.
1h = 7P0MEG : Internal. Only to be used through TI provided API.
2h = 6P5MEG : Internal. Only to be used through TI provided API.
3h = 6P0MEG : Internal. Only to be used through TI provided API.
7-0 RCOSCLF_CTUNE_TRIM R/W X
Internal. Only to be used through TI provided API.
522
Power, Reset, and Clock Management SWCU117A–February 2015–Revised March 2015
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