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6.2.4.7 ANABYPASSVAL1 Register (Offset = 18h) [reset = X]
ANABYPASSVAL1 is shown in Figure 6-87 and described in Table 6-92.
Analog Bypass Values 1
Figure 6-87. ANABYPASSVAL1 Register
31 30 29 28 27 26 25 24
RESERVED
R/W-X
23 22 21 20 19 18 17 16
RESERVED XOSC_HF_ROW_Q12
R/W-X R/W-X
15 14 13 12 11 10 9 8
XOSC_HF_COLUMN_Q12
R/W-X
7 6 5 4 3 2 1 0
XOSC_HF_COLUMN_Q12
R/W-X
Table 6-92. ANABYPASSVAL1 Register Field Descriptions
Bit Field Type Reset Description
31-20 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
19-16 XOSC_HF_ROW_Q12 R/W X
Internal. Only to be used through TI provided API.
15-0 XOSC_HF_COLUMN_Q1 R/W X
Internal. Only to be used through TI provided API.
2
517
SWCU117A–February 2015–Revised March 2015 Power, Reset, and Clock Management
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