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PRCM Registers

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6.2.2.3 SLEEPCTL Register (Offset = 8h) [reset = X]

SLEEPCTL is shown in Figure 6-66 and described in Table 6-69.

Sleep Mode This register is used to unfreeze the IO pad ring after waking up from SHUTDOWN

Figure 6-66. SLEEPCTL Register

31 30 29 28 27 26 25 24

RESERVED

R-X

23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8

RESERVED

R-X

7 6 5 4 3 2 1 0

RESERVED IO_PAD_SLEE

P_DIS

R-X R/W-X

Table 6-69. SLEEPCTL Register Field Descriptions

Bit Field Type Reset Description

31-1 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

0 IO_PAD_SLEEP_DIS R/W X

Controls the I/O pad sleep mode. The boot code will set this bitfield

automatically unless waking up from a SHUTDOWN (

RESETCTL.WU_FROM_SD is set ). 0: I/O pad sleep mode is

enabled, ie all pads are latched and can not toggle. 1: I/O pad sleep

mode is disabled Application software may want to reconfigure the

state for all IO 's before setting this bitfield upon waking up from a

SHUTDOWN.

492

Power, Reset, and Clock Management SWCU117A–February 2015–Revised March 2015

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