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PRCM Registers

6.2.1.42 PDSTAT0 Register (Offset = 140h) [reset = X]

PDSTAT0 is shown in Figure 6-48 and described in Table 6-50.

Power Domain Status

Figure 6-48. PDSTAT0 Register

31 30 29 28 27 26 25 24

RESERVED

R-X

23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8

RESERVED

R-X

7 6 5 4 3 2 1 0

RESERVED PERIPH_ON SERIAL_ON RFC_ON

R-X R-X R-X R-X

Table 6-50. PDSTAT0 Register Field Descriptions

Bit Field Type Reset Description

31-3 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

2 PERIPH_ON R X

PERIPH Power domain. 0: Domain may be powered down 1:

Domain powered up (guaranteed)

1 SERIAL_ON R X

SERIAL Power domain. 0: Domain may be powered down 1: Domain

powered up (guaranteed)

0 RFC_ON R X

RFC Power domain 0: Domain may be powered down 1: Domain

powered up (guaranteed)

471

SWCU117A–February 2015–Revised March 2015 Power, Reset, and Clock Management

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