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PRCM Registers

6.2.1.36 SWRESET Register (Offset = 10Ch) [reset = X]

SWRESET is shown in Figure 6-42 and described in Table 6-44.

SW Initiated Resets

Figure 6-42. SWRESET Register

31 30 29 28 27 26 25 24

RESERVED

R-X

23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8

RESERVED

R-X

7 6 5 4 3 2 1 0

RESERVED MCU RESERVED

R-X W-X W-X

Table 6-44. SWRESET Register Field Descriptions

Bit Field Type Reset Description

31-3 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

2 MCU W X

Internal. Only to be used through TI provided API.

1-0 RESERVED W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

465

SWCU117A–February 2015–Revised March 2015 Power, Reset, and Clock Management

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