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Table 6-6. Example Sequence for Setting CC26xx in Standby Mode (continued)
Description Register Required step
Set the LF clocks to correct source [DDI_0_OSC:CTL0.SCLK_LF_SRC_SEL] Yes
Configure recharge interval [AON_WUC:RECHARGECFG] Yes
Configure one or more wake-up [AON_EVENT:MCUWUSEL] Yes
sources for MCU
Configure power-down clock for [AON_WUC:MCUCLK.PWR_DWN:SRC] No (Default: No clock)
MCU
Configure power-down clock for [AON_WUC:AUXCLK.PWR_DWN:SRC] No (Default: No clock)
AUX
Configure system SRAM retention [AON_WUC:MCUCFG.SRAM_RET_EN] No (Default: Retention enabled)
Turn off JTAG [AON_WUC:JTAGCFG:JTAG_PD_FORCE_ Yes
ON]
Configure the wake-up source to IOC:IOCFG / AON_RTC / AUX Yes
generate an event
Request AUX_PD power down [AUX_WUC:PWRDWNREQ.REQ] Yes
Disconnect AUX from system bus [AUX_WUC:MCUBUSCTL.DISCONNECT_R Yes
EQ]
Latch I/O state [AON_IOC:IOCLATCH.EN] Yes
Turn off power domains and verify [PRCM.PDCTL0] Yes
they are turned off [PRCM.PDCTL1]
[PRCM.PDSTAT0]
[PRCM.PDSTAT1]
Request digital supply to be Micro [PRCM:VDCTL:ULDO] Yes
LDO
Synchronize transactions to AON [AON_RTC.SYNC.WBUSY] Yes (Read register)
domain
Set the system CPU SLEEPDEEP [CPU_SCS:SCR.SLEEPDEEP] Yes
bit
Stop the system CPU to start the WFI or WFE Yes
power-down sequence
6.1.5.5 Shutdown Mode
Shutdown mode is defined as having no active power regulator in the CC26xx device.
Before putting the CC26xx device in shutdown mode, I/O pins are latched to keep their output values in
shutdown. This is the only difference between holding the CC26xx device in reset with the reset pin and
shutdown mode.
Only an enabled pin interrupt or reset pin can wake up the CC26xx device from shutdown mode (see ).
Table 6-7. Example Sequence for Going to Shut Down
Description Register Required step
Enable shutdown and latch I/Os [AON_WUC:SHUTDOWN.EN] Yes
Turn off JTAG [AON_WUC:JTAGCFG:JTAG_PD_FORCE_ON] Yes
Configure the wake-up pin IOC:IOCFGxx:WU_CFG Yes
Request AUX power down [AUX_WUC:PWRDWNREQ.REQ] Yes
Disconnect AUX from system bus [AUX_WUC:MCUBUSCTL.DISCONNECT_REQ] Yes
Request MCU_VD power off [PRCM:VDCTL.MCU_VD] Yes
Synchronize transactions to AON [AON_RTC.SYNC] Yes (Read register)
domain
Set the system CPU SLEEPDEEP [CPU_SCS:SCR.SLEEPDEEP] Yes
bit
Stop the system CPU to start the WFI or WFE Yes
power-down sequence
425
SWCU117A–February 2015–Revised March 2015 Power, Reset, and Clock Management
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