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4.6.2.96 SWEV Register (Offset = F00h) [reset = X]
SWEV is shown in Figure 4-105 and described in Table 4-111.
Set or Clear Software Events
Figure 4-105. SWEV Register
31 30 29 28 27 26 25 24
RESERVED SWEV3
R-X R/W-X
23 22 21 20 19 18 17 16
RESERVED SWEV2
R-X R/W-X
15 14 13 12 11 10 9 8
RESERVED SWEV1
R-X R/W-X
7 6 5 4 3 2 1 0
RESERVED SWEV0
R-X R/W-X
Table 4-111. SWEV Register Field Descriptions
Bit Field Type Reset Description
31-25 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
24 SWEV3 R/W X
Writing "1" to this bit when the value is "0" triggers the Software 3
event.
23-17 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
16 SWEV2 R/W X
Writing "1" to this bit when the value is "0" triggers the Software 2
event.
15-9 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
8 SWEV1 R/W X
Writing "1" to this bit when the value is "0" triggers the Software 1
event.
7-1 RESERVED R X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
0 SWEV0 R/W X
Writing "1" to this bit when the value is "0" triggers the Software 0
event.
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Interrupts and Events SWCU117A–February 2015–Revised March 2015
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