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Interrupts and Events Registers

4.6.2.95 FRZSEL0 Register (Offset = A00h) [reset = X]

FRZSEL0 is shown in Figure 4-104 and described in Table 4-110.

Output Selection for FRZ Subscriber 0

Figure 4-104. FRZSEL0 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED EV

R-X R/W-78h

Table 4-110. FRZSEL0 Register Field Descriptions

Bit Field Type Reset Description

31-7 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

6-0 EV R/W 78h

Read/write selection value

0h = Always inactive

78h = CPU halted

79h = Always asserted

387

SWCU117A–February 2015–Revised March 2015 Interrupts and Events

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