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Interrupts and Events Registers

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4.6.2.14 CPUIRQSEL13 Register (Offset = 34h) [reset = X]

CPUIRQSEL13 is shown in Figure 4-23 and described in Table 4-29.

Output Selection for CPU Interrupt 13

Figure 4-23. CPUIRQSEL13 Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED EV

R-X R-1Dh

Table 4-29. CPUIRQSEL13 Register Field Descriptions

Bit Field Type Reset Description

31-7 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

6-0 EV R 1Dh

Read only selection value

1Dh = AUX software event 1, triggered by

AUX_EVCTL:SWEVSET.SWEV1, also available as AUX_EVENT2

AON wake up event. MCU domain wakeup control

AON_EVENT:MCUWUSEL AUX domain wakeup control

AON_EVENT:AUXWUSEL

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Interrupts and Events SWCU117A–February 2015–Revised March 2015

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