User manual

www.ti.com Cortex™-M3 Peripherals Introduction
3.1 Cortex™-M3 Peripherals Introduction
This chapter provides information on the CC26xx implementation of the Cortex-M3 processor peripherals,
including:
• System timer (SysTick) (see SysTick): Provides a simple, 24-bit clear-on-write, decrementing, wrap-on-
zero counter with a flexible control mechanism.
• Nested vectored interrupt controller (NVIC) (see NVIC):
– Facilitates low-latency exception and interrupt handling
– Works with system controller (see Chapter 6) to control power management
– Implements system control registers
• M3 system control block (SCB) (see SCB): Provides system implementation information and system
control, including configuration, control, and reporting of system exceptions.
Table 3-1 lists the address map of the private peripheral bus (PPB). Some peripheral register regions are
split into two address regions, as indicated by two addresses listed.
Table 3-1. Core Peripheral Register Regions
ADDRESS CORE PERIPHERAL LINK
0xE000 E010 – 0xE000 E01C System Timer (SysTick) SysTick
0xE000 E100 – 0xE000 E420 Nested Vectored Interrupt Controller
NVIC
0xE000 EF00 – 0xE000 EF00 (NVIC)
0xE000 E008 – 0xE000 E00F
System Control Block (SCB) SCB
0xE000 ED00 – 0xE000 ED3F
0xE000 1000 – 0xE000 1FFC Data Watchpoint and Trace (DWT)
0xE000 2000 – 0xE000 2FFC Flash Patch and Breakpoint (FPB)
0xE000 0000 – 0xE000 0FFC Instrumentation Trace Macrocel (ITM)
0xE00F 1000 – 0xE00F FFFC ROM table
0xE004 0000 – 0xE004 0FFC Trace Port Interface Unit (TPIU)
0xE00F EFF8 – 0xE00F EFFC TIPROP
3.2 Functional Description
This chapter provides information on the CC2650 implementation of the Cortex-M3 processor peripherals:
• SysTick
• NVIC
• SCB
• ITM
• DWT
• TPIU
• FPB
• ROM table
• TIPROP
3.2.1 SysTick
Cortex-M3 includes an integrated system timer, SysTick, which provides a simple, 24-bit clear-on-write,
decrementing, wrap-on-zero counter with a flexible control mechanism. The counter can be used in
several different ways. For example, the counter can be:
• An RTOS tick timer that fires at a programmable rate (for example, 100 Hz) and invokes a SysTick
routine
• A high-speed alarm timer using the system clock
• A variable rate alarm or signal timer—the duration is range-dependent on the reference clock used and
221
SWCU117A–February 2015–Revised March 2015 Cortex™-M3 Peripherals
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated