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Cortex-M3 Processor Registers

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2.7.5.11 CLAIMCLR Register (Offset = FA4h) [reset = X]

CLAIMCLR is shown in Figure 2-141 and described in Table 2-168.

Claim Tag Clear

Figure 2-141. CLAIMCLR Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CLAIMCLR

W-X

Table 2-168. CLAIMCLR Register Field Descriptions

Bit Field Type Reset Description

31-0 CLAIMCLR W X

This register forms one half of the Claim Tag value. Writing to this

location enables individual bits to be cleared (each bit is considered

separately): 0: No effect 1: Clear this bit in the claim tag. The

behavior when reading from this location is described in CLAIMTAG.

218

SWCU117A–February 2015–Revised March 2015

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