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Cortex-M3 Processor Registers

2.7.5.8 CLAIMMASK Register (Offset = FA0h) [reset = Fh]

CLAIMMASK is shown in Figure 2-138 and described in Table 2-165.

Claim Tag Mask

Figure 2-138. CLAIMMASK Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CLAIMMASK

R-Fh

Table 2-165. CLAIMMASK Register Field Descriptions

Bit Field Type Reset Description

31-0 CLAIMMASK R Fh

This register forms one half of the Claim Tag value. When reading

this register returns the number of bits that can be set (each bit is

considered separately): 0: This claim tag bit is not implemented 1:

This claim tag bit is not implemented The behavior when writing to

this register is described in CLAIMSET.

215

SWCU117A–February 2015–Revised March 2015

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