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2.7.4.35 SHCSR Register (Offset = D24h) [reset = X]
SHCSR is shown in Figure 2-105 and described in Table 2-131.
System Handler Control and State This register is used to enable or disable the system handlers,
determine the pending status of bus fault, mem manage fault, and SVC, determine the active status of the
system handlers. If a fault condition occurs while its fault handler is disabled, the fault escalates to a Hard
Fault.
Figure 2-105. SHCSR Register
31 30 29 28 27 26 25 24
RESERVED
R/W-X
23 22 21 20 19 18 17 16
RESERVED USGFAULTEN BUSFAULTEN MEMFAULTEN
A A A
R/W-X R/W-X R/W-X R/W-X
15 14 13 12 11 10 9 8
SVCALLPEND BUSFAULTPE MEMFAULTPE USGFAULTPE SYSTICKACT PENDSVACT RESERVED MONITORACT
ED NDED NDED NDED
R-X R-X R-X R-X R-X R-X R-X R-X
7 6 5 4 3 2 1 0
SVCALLACT RESERVED USGFAULTAC RESERVED BUSFAULTAC MEMFAULTAC
T T T
R-X R-X R-X R-X R-X R-X
Table 2-131. SHCSR Register Field Descriptions
Bit Field Type Reset Description
31-19 RESERVED R/W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
18 USGFAULTENA R/W X
Usage fault system handler enable
0h = Exception disabled
1h = Exception enabled
17 BUSFAULTENA R/W X
Bus fault system handler enable
0h = Exception disabled
1h = Exception enabled
16 MEMFAULTENA R/W X
MemManage fault system handler enable
0h = Exception disabled
1h = Exception enabled
15 SVCALLPENDED R X
SVCall pending
0h = Exception is not active
1h = Exception is pending.
14 BUSFAULTPENDED R X
BusFault pending
0h = Exception is not active
1h = Exception is pending.
13 MEMFAULTPENDED R X
MemManage exception pending
0h = Exception is not active
1h = Exception is pending.
12 USGFAULTPENDED R X
Usage fault pending
0h = Exception is not active
1h = Exception is pending.
11 SYSTICKACT R X
SysTick active flag. 0x0: Not active 0x1: Active
0h = Exception is not active
1h = Exception is active
176
SWCU117A–February 2015–Revised March 2015
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