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Cortex-M3 Processor Registers

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2.7.4.28 VTOR Register (Offset = D08h) [reset = X]

VTOR is shown in Figure 2-98 and described in Table 2-124.

Vector Table Offset This register is used to relocated the vector table base address. The vector table base

offset determines the offset from the bottom of the memory map. The two most significant bits and the

seven least significant bits of the vector table base offset must be 0. The portion of vector table base

offset that is allowed to change is TBLOFF.

Figure 2-98. VTOR Register

31 30 29 28 27 26 25 24

RESERVED TBLOFF

R/W-X R/W-X

23 22 21 20 19 18 17 16

TBLOFF

R/W-X

15 14 13 12 11 10 9 8

TBLOFF

R/W-X

7 6 5 4 3 2 1 0

TBLOFF RESERVED

R/W-X R/W-X

Table 2-124. VTOR Register Field Descriptions

Bit Field Type Reset Description

31-30 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

29-7 TBLOFF R/W X

Bits 29 down to 7 of the vector table base offset.

6-0 RESERVED R/W X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

168

SWCU117A–February 2015–Revised March 2015

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