User manual

Radio Doorbell

www.ti.com

Each of the blocks illustrated in Figure 23-1 performs the following functions:

System Side

• System CPU: Main system processor which runs the user's application, together with the high level

protocol stack (for a number of supported configurations) and eventually some higher-level MAC

features for some protocols. The system CPU runs code from the boot ROM and the system flash.

• System RAM: Contains packet information (TX and RX payloads) and the different parameters or

configuration options for a given transaction.

• Security Subsystem: Encompasses the different elements to provide protocol confidentiality and

authentication.

• DMA: Optionally charged with the task of moving information from the radio RAM to the system RAM

and vice versa, if direct CPU access is not used.

Radio Side

• Radio CPU: Main RF core processor. Receives high-level commands from the system CPU and

schedules them into the different parts of the RF core.

• Modem, Frequency Synthesizer, RF Interfaces: This is the core of the radio itself, converting the bits

into modulated signals and vice versa.

23.2 Radio Doorbell

The radio doorbell module (RFC_DBELL) is the primary means of communication between the system

CPU and the radio CPU, also known as Command and Packet Engine (CPE). The radio doorbell contains

a set of dedicated registers, parameters in any of the RAMs of the device, and a set of interrupts to both

the radio CPU and to the system CPU.

In addition, parameters and payload are transferred through the system RAM or the radio RAM. If any

parameters or payload are in the system RAM, the system CPU must remain powered, while if everything

is in the radio RAM, the system CPU may go into power-down mode to save current.

During operation, the radio CPU updates parameters and payload in RAM and raises interrupts. The

system CPU may mask out interrupts, so that it remains in idle or power-down until the entire radio

operation is complete.

Because both the system CPU and the radio CPU share a common RAM area, ensure that no contention

or race conditions can occur. This is achieved in software by rules set up in the radio hardware abstraction

layer (HAL).

Figure 23-2 shows the relevant modules for information exchange between the CPUs.

1456

Radio SWCU117A–February 2015–Revised March 2015

Submit Documentation Feedback