User manual

I2S Registers www.ti.com
22.10.1.29 IRQSET Register (Offset = 78h) [reset = X]
IRQSET is shown in Figure 22-36 and described in Table 22-30.
Interrupt Set Register
Figure 22-36. IRQSET Register
31 30 29 28 27 26 25 24
RESERVED
W-X
23 22 21 20 19 18 17 16
RESERVED
W-X
15 14 13 12 11 10 9 8
RESERVED
W-X
7 6 5 4 3 2 1 0
RESERVED AIF_DMA_IN AIF_DMA_OUT WCLK_TIMEO BUS_ERR WCLK_ERR PTR_ERR
UT
W-X W-X W-X W-X W-X W-X W-X
Table 22-30. IRQSET Register Field Descriptions
Bit Field Type Reset Description
31-6 RESERVED W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
5 AIF_DMA_IN W X
1: Sets the interrupt of IRQFLAGS.AIF_DMA_IN (unless a auto clear
criteria was given at the same time, in which the set will be ignored)
4 AIF_DMA_OUT W X
1: Sets the interrupt of IRQFLAGS.AIF_DMA_OUT (unless a auto
clear criteria was given at the same time, in which the set will be
ignored)
3 WCLK_TIMEOUT W X
1: Sets the interrupt of IRQFLAGS.WCLK_TIMEOUT
2 BUS_ERR W X
1: Sets the interrupt of IRQFLAGS.BUS_ERR
1 WCLK_ERR W X
1: Sets the interrupt of IRQFLAGS.WCLK_ERR
0 PTR_ERR W X
1: Sets the interrupt of IRQFLAGS.PTR_ERR
1452
Integrated Interchip Sound (I2S) Module SWCU117A–February 2015–Revised March 2015
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated